Pseudowire Emulation Edge-to-Edge (PWE3) Fragmentation and Reassembly
Extracted elements (33)
PW-specific fragmentation is preferred over IP PSN fragmentation at scale because it allows per-PW buffer assignment, leverages PW sequencing, and can be selectively enabled per-PW rather than applying to all IP traffic at a node.
PWE3 fragmentation reuses existing PW sequence number fields rather than defining a separate fragmentation header (as RFC 1990 did). This avoids adding overhead to a new dedicated header when the PW control word already carries a sequence number.
PWE3 fragmentation should be used only as a last resort after MTU-management methods (path MTU discovery, CE-PE MTU configuration) fail, because fragmentation and reassembly in core network devices require significantly greater resources than forwarding a single packet.
PWE3 inverts the B and E bit values from RFC 1990: in PWE3, 00 means complete/unfragmented (first=0, last=0), whereas RFC 1990 uses 11. This allows implementations that only support complete frames to leave B and E bits at their default zero value without any special handling.
IPv6 packets MUST NOT be fragmented at the IP level before entering a PW. IPv4 packets with the DF bit clear may be fragmented by the PE before PW encapsulation, which is transparent to the PW itself; IPv6 does not permit this.
Reassembly support for L2TP PWs MAY be unidirectional; each side independently advertises its reassembly capability via the MRRU AVP. The most recent AVP value received always takes precedence and MUST be updated dynamically if received via the SLI message.
The B and E bit locations for PW-Types that use a variant L2-specific sublayer (other than the Default L2-Specific Sublayer) are outside the scope of this document and must be defined by those PW-Type specifications.
B and E bits MUST be defined or identified for all PWE3 tunneling protocols to support fragmentation.
Deployments SHOULD avoid combining IP PSN and PW fragmentation and reassembly on the same node. When PW fragmentation is enabled, the DF bit MUST be set on all L2TP over IP packets for that PW.
If MPLS-Control signaling is not in use, whether or not to use fragmentation MUST be configured in the sender.
If the value 0 is not part of the sequence number space, the sequence number used for fragmentation MUST skip zero and wrap from 65535 to 1.
Implementations fragmenting a PW frame MUST at the very least ensure that all fragments are sent in order from their own egress point.
Implementations MUST ensure that no more than one whole fragment overwrites another in a reconstructed frame, preventing fragment overlap attacks.
L2TPv3 nodes SHOULD participate in Path MTU for automatic adjustment of the PSN MTU. When the payload is IP, Path MTU should be used at the payload level as well.
Packet fragments MUST NOT be sent by a peer that has not received the MRRU AVP in a control message. If the MRRU is present, the MRU AVP MUST also be present.
The sender MUST NOT use fragmentation if the Fragmentation Indicator parameter (0x09) is not present in the VC FEC element when using MPLS-Control signaling.
The signaled Interface MTU parameter in MPLS-Control SHOULD be used to set the maximum size of the reassembly buffer for received packets to make optimal use of reassembly buffer resources.
Using the Sequence Number field on fragmented packets is REQUIRED. Fragmentation is performed first, then resulting fragments are assigned sequential sequence numbers.
When a receiver detects a skipped (out-of-order) fragment and chooses to wait, a reassembly timer MUST be used to avoid locking up buffer resources for too long.
When fragmentation is used in L2TPv3, an L2-Specific Sublayer with B and E bits defined MUST be present in all data packets for a given session.
The MPLS Pseudowire Interface Parameter Sub-TLV type 0x09 (length 4), the Fragmentation Indicator, signals that the receiver is able to reassemble fragments when the control word is in use. Its presence does not obligate the sender to use fragmentation.
The MRRU (Maximum Reassembled Receive Unit) AVP, attribute number 95, advertises the maximum size of a reassembled frame excluding L2TP encapsulation and L2-specific sublayer. Its presence in a control message signifies the ability to receive and reassemble PW fragments.
The MRU (Maximum Receive Unit) AVP, attribute number 94, advertises the maximum size in octets of a fragmented or complete PW frame including L2TP encapsulation but excluding the PSN header. It does not by itself imply reassembly support.
IANA assigned two new L2TP Control Message AVP attributes: 94 for Maximum Receive Unit (MRU) and 95 for Maximum Reassembled Receive Unit (MRRU), as defined in Sections 5.3 and 5.4.
IANA assigned two reserved bits in the Default L2-Specific Sublayer registry (per L2TPv3): Bit 2 as the B (Fragmentation) bit and Bit 3 as the E (Fragmentation) bit.
IANA assigned two reserved bits in the L2TPv2 Message Header: Bit 8 as the B (Fragmentation) bit and Bit 9 as the E (Fragmentation) bit.
Implementers must guard against resource exhaustion from pathological fragment combinations. Even the most adversarial combination of received fragments must not allow an attacker to consume an unbounded amount of reassembly buffer resources.
Unlike IP fragmentation (RFC 1858, RFC 3128), PW-specific fragmentation has no offset field, preventing fragment-overlap attacks. However, all filtering and access controls MUST be applied to the reconstructed frame, not individual PW fragments, to prevent tiny-fragment bypass attacks on tunneled payload.
The B/E bit encoding defines four fragment states: 00 = complete unfragmented packet; 01 = first fragment; 10 = last fragment; 11 = intermediate fragment. This encoding is inverted from RFC 1990.
B and E fragmentation bits for L2TPv2 are located at bits 8 and 9 of the leading bits of the L2TPv2 message header, alongside existing T, L, S, O, P, and Ver fields.
B and E fragmentation bits for L2TPv3 are located at bits 2 and 3 in the Default L2-Specific Sublayer, alongside the S (Sequence) bit at bit 1 and a 24-bit Sequence Number field.
The MPLS PWE3 control word is 32 bits: bits 0-3 are zero, bits 4-7 are Flags, bit 8 is B (Beginning fragment), bit 9 is E (Ending fragment), bits 10-15 are Length, and bits 16-31 are the Sequence Number.
The MRU AVP (attr 94) and MRRU AVP (attr 95) each have a 6-octet fixed portion: M/H/reserved bits, Length field, Vendor ID 0, and a 2-octet MRU or MRRU value. Total length before hiding is 8 octets.